Are you interested in joining a team that creates innovative hardware and delivers industry leading AI performance and efficiency? Our Client is looking for Design Verification Engineers who are capable of planning, building and debugging a robust verification environment.
Responsibilities & Requirements
- BS/MS/PHD in EE/CE/CS, or equivalent
- Prior internship or 1+ year experience in in RTL design/RTL Verification (Verilog/SystemVerilog)
- Experience with Object Oriented Programming concepts
- Experience with various verification tasks - test plan development, test bench development, simulation/waveform debug, coverage analysis
- Good verbal and written communication skills
- Ability to work independently and as part of a team
- Problem-solving and trouble-shooting skills; ability to take initiative and solve problems
Preferred Skills & Experience
- Good understanding of computer architecture
- Good understanding of PCI Express
- Knowledge of memory interfaces (DDR/LPDDR/etc.)
- Working knowledge of Linux
- Working experience in C/C++/Assembly
- Working knowledge of Python/Perl
- Working experience in verification with SV/UVM.
- Knowledge of Deep Learning concepts and frameworks is a plus
We are is developing a groundbreaking new architecture that will bring neural net inference to new levels of performance and efficiency. Founded in Toronto in 2018 by a team of scientists and entrepreneurs, our ultra-efficient, high performance AI chips will eliminate the data movement bottleneck that costs energy and performance in traditional architectures. With the support of tier one investors, we are challenging the status quo with an architecture that is fundamentally unique. Working with us means getting the opportunity to be a part of something big - a chance to create the future of AI.